Opening the floodgates to more chip & IP offerings

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As we continue to follow the impact of Arm’s IPO on the broader embedded ecosystem, we brought in commentary from another reputable analyst, Kevin Krewell. As Principal Analyst at TIRIAS Research, Kevin has decades of experience in AI, graphics, embedded systems, microprocessors, and quantum computing markets. Kevin shares his thoughts on the Arm IPO and what the future of embedded tech will look like in a world of three core architectures – x86, Arm, and RISC-V.

Question: You have followed Arm for years, including with the SoftBank purchase and the Arm/NVIDIA deal talks. What’s your take on the recent Arm IPO?

Kevin Krewell: When SoftBank decided to sell off Arm there really were only a very few options that could satisfy both the perceived valuation of the company and maintain the independence of Arm. It was originally floated that Arm could be co-owned by several prominent licensees, but that quickly proved to be untenable. When Nvidia stepped up and said it would be willing to purchase the entire company, SoftBank said it would be taking a position in NVIDIA in support of the plan, it that seemed like the most profitable opportunity for SoftBank to exit ownership.

The challenge for NVIDIA was that it’s a competitor to many of the other Arm licensees and therefore ran into opposition from those licensees as well as deep regulatory scrutiny. When Nvidia eventually pulled the plug on its acquisition plans after it was clear regulatory approval was not going to happen, Softbank’s “Plan B” was to bring Arm back to the public market as a public offering.

The IPO proved to be one of the biggest IPOs in recent years. SoftBank, though, no longer wanted to relinquish complete control of Arm and maintained majority ownership of the company. This was probably the best time for the Arm public offering as it is gaining traction in data center applications with chip designs from Amazon AWS, Ampere, and Nvidia. The data center which is Arm’s most significant growth opportunity as it has saturated mobile and embedded designs. Unfortunately for Arm right now, there is a soft market for cellular phones which is a very large market dominated by the Arm architecture.

Arm, through its licensees Apple and Qualcomm, is also making progress in the personal computer space that has been dominated by the AMD and Intel x86 architecture. In fact, Apple has migrated its entire Mac computer line to Arm designs. If we see a rebound in the cellular business and further penetration into the data center, Arm should see an upswing in revenues. That said, it is also seeing an existential challenge by the RISC-V architecture that is starting to gain share in embedded systems and appears to be moving relatively quickly into high performance applications including data center.

Question: How does this IPO impact the silicon market? Are there any specific industry segments that will be most positively impacted by this IPO? Conversely, any negatively?

Kevin Krewell: The Arm IPO has the potential to open the floodgates to more chip and intellectual property (IP) related IPOs which have been extremely slow in recent months. There are several silicon and IP startups, mostly related to AI or RISC-V, that could file for public offerings to raise additional capital. While the initial reaction to the Arm IPO was positive, we will have to see the long-term trend in the stock price to gauge its ultimate success. While Arm has mentioned that AI is part of its strategy, the company is not a primary beneficiary of the AI boom. Rather the company’s CPUs support AI specifically through designs such as NVIDIA ‘s “Grace Hopper” GH200 chip. In addition, Arm is a power-efficient and performant CPU architecture that can support other AI accelerators.

Question: In your opinion, what does the future of design look like–x86, Arm and RISC-V?

Kevin Krewell: The microprocessor business has basically come down to three main instruction set architectures: Arm, RISC-V, and x86. The x86 is the oldest of the instruction sets but has morphed over the years and has proved to be an extremely adaptable instruction set, despite its complexities, due to the extraordinary efforts and investments of AMD and Intel. The Arm architecture has focused on low power for mobile and embedded designs and eventually migrated up to higher performance overtime. You can now see Arm cores nearly as performant as x86 cores.

The challenge for both x86 and Arm is the limited number of vendors that control the architectures. In the case of x86 there is only AMD and Intel that can define the instruction set and make the chips. With Arm, the company defines the architecture but many companies that can build the chips using various Arm designed cores or for those lucky and rich enough to have an architectural license, they can design their own cores to Arm’s specifications.

With RISC-V we’re entering a new era where you have many vendors helping to define the instruction set, with extensible opportunities for customization, and many vendors supplying chips and CPU cores. The biggest concern for RISC-V has been that this marketplace could become too fractured and difficult to standardize for ubiquitous software development. The RISC-V International consortium is taking steps to address these issues through the development of standard profiles that will allow the right amount of standardization but can still allow experimentation in the marketplace. In fact, most of the recent chip startups I know of are choosing the RISC-V instruction set to build their products as it’s the most adaptable and flexible to develop new products with. While the RISC-V International consortium likes to say “RISC-V is inevitable,” I would also say it’s not going to totally replace Arm and x86 in the short term, but it will prove to be an important driver of innovation today and in the future.

Question: The industry is buzzing about “chiplets”— where small individual silicon die can be combined in one package to build various products. How do chiplets impact Arm, RISC-V and x86 designs?

Kevin Krewell: Recently, I was at Intel’s Innovation developer conference and there’s no better place to see the impact of chiplets (which Intel also calls “tiles”). Intel’s forthcoming Meteor Lake notebook processor is composed of four tiles, some made by Intel and some made by TSMC, all connected by the company’s Foveros die interconnect technology on package. I also saw that the future of Intel’s FPGA family will include chips with Universal Chiplet Interconnect Express (UCIe) the emerging standard for die-to-die interconnects for multi-die systems. UCIe interfaces that will allow Intel to package FPGAs with chiplets from other companies in one package. AMD is also well known for its chiplet approach, but Intel has kicked it up a notch with Meteor Lake.

There’s a RISC-V start up called Ventana Microsystems that is building data-center class RISC-V cores on a chiplet for integration into larger system packages. I also would not be surprised to see Arm offer chiplet designs in the near future – it is already offering pre-configured Neoverse Compute Subsystems (CSS) to speed Arm server development. Arm could easily offer Neoverse CSS in a chiplet form.


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